Setting the Proper Step Rate

Because the MCP-1200 has a servo-based architecture, setting the proper sample period is critical to producing reasonable values for velocity and acceleration.

Stepper Motor Control

Stepper Control Registers
R02H – “Advanced Configuration Register”
Bit 1 – Step Mode Enable (1 = Step Mode On)
Bit 2 – Step Output Polarity (0=High Pulse, 1=Low Pulse)
R0FH – “Sample Timer”
R10H – “Sample Timer Prescaler MSB”
R11H – “Sample Timer Prescaler LSB”
R1BH – “Step Pulse Width” (default=15)

This mode reconfigures the output to the Pulse and Sign pins (pins 18 and 19) to provide Step and Direction signals for a stepper motor driver.  Bit 1 of the Advanced Configuration Register (R02H) is set to one to enable Stepper Motor control.

The step pulse polarity and width are programmable.  Bit 2 of Advance Configuration register selects a high pulse if zero (default) or a low pulse if set to one.  The width of the step pulse is dependent on the value of the Step Pulse Width Register (R1BH).  The resulting step pulse is equal to the number of system clock periods specified by the register value plus one:

Step Pulse Width = (Register Value + 1) * 1/Clock Freq.

For example, the default register value of 15 and a system clock rate of 8 MHz will result in a step pulse width of 2 mS.  At 20 MHz, a value of 150 would give the pulse width of 8 mS.

To insure adequate set-up time, any change in the direction output precedes the step pulse by a fixed, firmware-determined period of approximately 1080 system clock cycles.  At 20 MHz this equates to 54mS. 

While the most obvious characteristic of operation in the step mode is the output of Step and Direction signals, the “open-loop” nature of stepper motor operation results in several internal changes in the chip.  Although a position encoder may be used as an option to detect motor stalls or driver problems (see the separate Stepper Encoder write-up), position feedback is not required in step mode.  As a result, the PID and Lead filters are not used.  The step and direction output is feed directly into the position counter.  This allows most of the chip’s features to function without modification in the step mode.

In the step mode care must be taken in the programming of the sample period in order to insure reasonable values for the velocity and acceleration settings.  Details on setting the 16-bit sample timer prescaler and the 8-bit sample timer are covered in a separate section.  Specific applications to the step mode are covered here.

The combination of prescalar, timer, and speed values result in a tremendous dynamic range for the step rate.  With a 20 MHz system clock the maximum rate is 1.28 million steps per second, while the minimum step rate is approximately one step every 3.6 minutes. (These limits scale linearly with clock rate.)  The maximum practical step rate is generally limited by the stepper motor, its driver, and the mechanical system being driven. 

As an example, consider a typical step motor system (bipolar, half-step drive) with a limit of 2500 step pulses per second.  Beyond this rate the motor’s rotor is unable to reach the next step position in a single pulse period and the motor will stall.  To achieve a comfortable range of speed values it is desirable to have this maximum speed coincide with a velocity value toward the upper limit of an 8-bit byte.  In this example, choosing a sample rate that would result in 2500 steps per second at a velocity setting of 250 steps per sample cycle would be ideal.

250 steps per sample cycle / 2500 steps per second = 0.1 seconds per sample cycle

The equation below (detailed in the Sample Timer write-up) allows us to choose prescalar and timer values to achieve this sample rate.

Sample Time = ((Prescalar_MSB*256 + Prescalar_LSB)+1) * (Timer+1) * 1/Clock Freq.

Assuming a system clock of 20 MHz and keeping the Timer value at its default of 59, the desired sample time can be achieved with a prescalar setting of 33,333.  Dividing by 256 gives a MSB value of 130 with a remainder of 53 for the LSB value. (You can also convert 33,333 to hexadecimal (8235h) where 82h is the MSB and 35h is the LSB.)

For our example these settings will result in a reasonable range of available velocity values if the default 8-bit velocity mode is used.  If the High-Resolution Velocity feature is enabled, these settings will provide even more precise speed selection.